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/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef _ASM_POWERPC_INTERRUPT_H
#define _ASM_POWERPC_INTERRUPT_H

/* BookE/4xx */
#define INTERRUPT_CRITICAL_INPUT  0x100

/* BookE */
#define INTERRUPT_DEBUG           0xd00
#ifdef CONFIG_BOOKE
#define INTERRUPT_PERFMON         0x260
#define INTERRUPT_DOORBELL        0x280
#endif

/* BookS/4xx/8xx */
#define INTERRUPT_MACHINE_CHECK   0x200

/* BookS/8xx */
#define INTERRUPT_SYSTEM_RESET    0x100

/* BookS */
#define INTERRUPT_DATA_SEGMENT    0x380
#define INTERRUPT_INST_SEGMENT    0x480
#define INTERRUPT_TRACE           0xd00
#define INTERRUPT_H_DATA_STORAGE  0xe00
#define INTERRUPT_HMI			0xe60
#define INTERRUPT_H_FAC_UNAVAIL   0xf80
#ifdef CONFIG_PPC_BOOK3S
#define INTERRUPT_DOORBELL        0xa00
#define INTERRUPT_PERFMON         0xf00
#define INTERRUPT_ALTIVEC_UNAVAIL	0xf20
#endif

/* BookE/BookS/4xx/8xx */
#define INTERRUPT_DATA_STORAGE    0x300
#define INTERRUPT_INST_STORAGE    0x400
#define INTERRUPT_EXTERNAL		0x500
#define INTERRUPT_ALIGNMENT       0x600
#define INTERRUPT_PROGRAM         0x700
#define INTERRUPT_SYSCALL         0xc00
#define INTERRUPT_TRACE			0xd00

/* BookE/BookS/44x */
#define INTERRUPT_FP_UNAVAIL      0x800

/* BookE/BookS/44x/8xx */
#define INTERRUPT_DECREMENTER     0x900

#ifndef INTERRUPT_PERFMON
#define INTERRUPT_PERFMON         0x0
#endif

/* 8xx */
#define INTERRUPT_SOFT_EMU_8xx		0x1000
#define INTERRUPT_INST_TLB_MISS_8xx	0x1100
#define INTERRUPT_DATA_TLB_MISS_8xx	0x1200
#define INTERRUPT_INST_TLB_ERROR_8xx	0x1300
#define INTERRUPT_DATA_TLB_ERROR_8xx	0x1400
#define INTERRUPT_DATA_BREAKPOINT_8xx	0x1c00
#define INTERRUPT_INST_BREAKPOINT_8xx	0x1d00

/* 603 */
#define INTERRUPT_INST_TLB_MISS_603		0x1000
#define INTERRUPT_DATA_LOAD_TLB_MISS_603	0x1100
#define INTERRUPT_DATA_STORE_TLB_MISS_603	0x1200

#ifndef __ASSEMBLY__

#include <linux/context_tracking.h>
#include <linux/hardirq.h>
#include <asm/cputime.h>
#include <asm/firmware.h>
#include <asm/ftrace.h>
#include <asm/kprobes.h>
#include <asm/runlatch.h>

#ifdef CONFIG_PPC_IRQ_SOFT_MASK_DEBUG
/*
 * WARN/BUG is handled with a program interrupt so minimise checks here to
 * avoid recursion and maximise the chance of getting the first oops handled.
 */
#define INT_SOFT_MASK_BUG_ON(regs, cond)				\
do {									\
	if ((user_mode(regs) || (TRAP(regs) != INTERRUPT_PROGRAM)))	\
		BUG_ON(cond);						\
} while (0)
#else
#define INT_SOFT_MASK_BUG_ON(regs, cond)
#endif

#ifdef CONFIG_PPC_BOOK3S_64
extern char __end_soft_masked[];
bool search_kernel_soft_mask_table(unsigned long addr);
unsigned long search_kernel_restart_table(unsigned long addr);

DECLARE_STATIC_KEY_FALSE(interrupt_exit_not_reentrant);

static inline bool is_implicit_soft_masked(struct pt_regs *regs)
{
	if (user_mode(regs))
		return false;

	if (regs->nip >= (unsigned long)__end_soft_masked)
		return false;

	return search_kernel_soft_mask_table(regs->nip);
}

static inline void srr_regs_clobbered(void)
{
	local_paca->srr_valid = 0;
	local_paca->hsrr_valid = 0;
}
#else
static inline unsigned long search_kernel_restart_table(unsigned long addr)
{
	return 0;
}

static inline bool is_implicit_soft_masked(struct pt_regs *regs)
{
	return false;
}

static inline void srr_regs_clobbered(void)
{
}
#endif

static inline void nap_adjust_return(struct pt_regs *regs)
{
#ifdef CONFIG_PPC_970_NAP
	if (unlikely(test_thread_local_flags(_TLF_NAPPING))) {
		/* Can avoid a test-and-clear because NMIs do not call this */
		clear_thread_local_flags(_TLF_NAPPING);
		regs_set_return_ip(regs, (unsigned long)power4_idle_nap_return);
	}
#endif
}

static inline void booke_restore_dbcr0(void)
{
#ifdef CONFIG_PPC_ADV_DEBUG_REGS
	unsigned long dbcr0 = current->thread.debug.dbcr0;

	if (IS_ENABLED(CONFIG_PPC32) && unlikely(dbcr0 & DBCR0_IDM)) {
		mtspr(SPRN_DBSR, -1);
		mtspr(SPRN_DBCR0, global_dbcr0[smp_processor_id()]);
	}
#endif
}

static inline void interrupt_enter_prepare(struct pt_regs *regs)
{
#ifdef CONFIG_PPC64
	irq_soft_mask_set(IRQS_ALL_DISABLED);

	/*
	 * If the interrupt was taken with HARD_DIS clear, then enable MSR[EE].
	 * Asynchronous interrupts get here with HARD_DIS set (see below), so
	 * this enables MSR[EE] for synchronous interrupts. IRQs remain
	 * soft-masked. The interrupt handler may later call
	 * interrupt_cond_local_irq_enable() to achieve a regular process
	 * context.
	 */
	if (!(local_paca->irq_happened & PACA_IRQ_HARD_DIS)) {
		INT_SOFT_MASK_BUG_ON(regs, !(regs->msr & MSR_EE));
		__hard_irq_enable();
	} else {
		__hard_RI_enable();
	}
	/* Enable MSR[RI] early, to support kernel SLB and hash faults */
#endif

	if (!arch_irq_disabled_regs(regs))
		trace_hardirqs_off();

	if (user_mode(regs)) {
		kuap_lock();
		CT_WARN_ON(ct_state() != CT_STATE_USER);
		user_exit_irqoff();

		account_cpu_user_entry();
		account_stolen_time();
	} else {
		kuap_save_and_lock(regs);
		/*
		 * CT_WARN_ON comes here via program_check_exception,
		 * so avoid recursion.
		 */
		if (TRAP(regs) != INTERRUPT_PROGRAM)
			CT_WARN_ON(ct_state() != CT_STATE_KERNEL &&
				   ct_state() != CT_STATE_IDLE);
		INT_SOFT_MASK_BUG_ON(regs, is_implicit_soft_masked(regs));
		INT_SOFT_MASK_BUG_ON(regs, arch_irq_disabled_regs(regs) &&
					   search_kernel_restart_table(regs->nip));
	}
	INT_SOFT_MASK_BUG_ON(regs, !arch_irq_disabled_regs(regs) &&
				   !(regs->msr & MSR_EE));

	booke_restore_dbcr0();
}

/*
 * Care should be taken to note that interrupt_exit_prepare and
 * interrupt_async_exit_prepare do not necessarily return immediately to
 * regs context (e.g., if regs is usermode, we don't necessarily return to
 * user mode). Other interrupts might be taken between here and return,
 * context switch / preemption may occur in the exit path after this, or a
 * signal may be delivered, etc.
 *
 * The real interrupt exit code is platform specific, e.g.,
 * interrupt_exit_user_prepare / interrupt_exit_kernel_prepare for 64s.
 *
 * However interrupt_nmi_exit_prepare does return directly to regs, because
 * NMIs do not do "exit work" or replay soft-masked interrupts.
 */
static inline void interrupt_exit_prepare(struct pt_regs *regs)
{
}

static inline void interrupt_async_enter_prepare(struct pt_regs *regs)
{
#ifdef CONFIG_PPC64
	/* Ensure interrupt_enter_prepare does not enable MSR[EE] */
	local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
#endif
	interrupt_enter_prepare(regs);
#ifdef CONFIG_PPC_BOOK3S_64
	/*
	 * RI=1 is set by interrupt_enter_prepare, so this thread flags access
	 * has to come afterward (it can cause SLB faults).
	 */
	if (cpu_has_feature(CPU_FTR_CTRL) &&
	    !test_thread_local_flags(_TLF_RUNLATCH))
		__ppc64_runlatch_on();
#endif
	irq_enter();
}

static inline void interrupt_async_exit_prepare(struct pt_regs *regs)
{
	/*
	 * Adjust at exit so the main handler sees the true NIA. This must
	 * come before irq_exit() because irq_exit can enable interrupts, and
	 * if another interrupt is taken before nap_adjust_return has run
	 * here, then that interrupt would return directly to idle nap return.
	 */
	nap_adjust_return(regs);

	irq_exit();
	interrupt_exit_prepare(regs);
}

struct interrupt_nmi_state {
#ifdef CONFIG_PPC64
	u8 irq_soft_mask;
	u8 irq_happened;
	u8 ftrace_enabled;
	u64 softe;
#endif
};

static inline bool nmi_disables_ftrace(struct pt_regs *regs)
{
	/* Allow DEC and PMI to be traced when they are soft-NMI */
	if (IS_ENABLED(CONFIG_PPC_BOOK3S_64)) {
		if (TRAP(regs) == INTERRUPT_DECREMENTER)
		       return false;
		if (TRAP(regs) == INTERRUPT_PERFMON)
		       return false;
	}
	if (IS_ENABLED(CONFIG_PPC_BOOK3E_64)) {
		if (TRAP(regs) == INTERRUPT_PERFMON)
			return false;
	}

	return true;
}

static inline void interrupt_nmi_enter_prepare(struct pt_regs *regs, struct interrupt_nmi_state *state)
{
#ifdef CONFIG_PPC64
	state->irq_soft_mask = local_paca->irq_soft_mask;
	state->irq_happened = local_paca->irq_happened;
	state->softe = regs->softe;

	/*
	 * Set IRQS_ALL_DISABLED unconditionally so irqs_disabled() does
	 * the right thing, and set IRQ_HARD_DIS. We do not want to reconcile
	 * because that goes through irq tracing which we don't want in NMI.
	 */
	local_paca->irq_soft_mask = IRQS_ALL_DISABLED;
	local_paca->irq_happened |= PACA_IRQ_HARD_DIS;

	if (!(regs->msr & MSR_EE) || is_implicit_soft_masked(regs)) {
		/*
		 * Adjust regs->softe to be soft-masked if it had not been
		 * reconcied (e.g., interrupt entry with MSR[EE]=0 but softe
		 * not yet set disabled), or if it was in an implicit soft
		 * masked state. This makes arch_irq_disabled_regs(regs)
		 * behave as expected.
		 */
		regs->softe = IRQS_ALL_DISABLED;
	}

	__hard_RI_enable();

	/* Don't do any per-CPU operations until interrupt state is fixed */

	if (nmi_disables_ftrace(regs)) {
		state->ftrace_enabled = this_cpu_get_ftrace_enabled();
		this_cpu_set_ftrace_enabled(0);
	}
#endif

	/* If data relocations are enabled, it's safe to use nmi_enter() */
	if (mfmsr() & MSR_DR) {
		nmi_enter();
		return;
	}

	/*
	 * But do not use nmi_enter() for pseries hash guest taking a real-mode
	 * NMI because not everything it touches is within the RMA limit.
	 */
	if (IS_ENABLED(CONFIG_PPC_BOOK3S_64) &&
	    firmware_has_feature(FW_FEATURE_LPAR) &&
	    !radix_enabled())
		return;

	/*
	 * Likewise, don't use it if we have some form of instrumentation (like
	 * KASAN shadow) that is not safe to access in real mode (even on radix)
	 */
	if (IS_ENABLED(CONFIG_KASAN))
		return;

	/*
	 * Likewise, do not use it in real mode if percpu first chunk is not
	 * embedded. With CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK enabled there
	 * are chances where percpu allocation can come from vmalloc area.
	 */
	if (percpu_first_chunk_is_paged)
		return;

	/* Otherwise, it should be safe to call it */
	nmi_enter();
}

static inline void interrupt_nmi_exit_prepare(struct pt_regs *regs, struct interrupt_nmi_state *state)
{
	if (mfmsr() & MSR_DR) {
		// nmi_exit if relocations are on
		nmi_exit();
	} else if (IS_ENABLED(CONFIG_PPC_BOOK3S_64) &&
		   firmware_has_feature(FW_FEATURE_LPAR) &&
		   !radix_enabled()) {
		// no nmi_exit for a pseries hash guest taking a real mode exception
	} else if (IS_ENABLED(CONFIG_KASAN)) {
		// no nmi_exit for KASAN in real mode
	} else if (percpu_first_chunk_is_paged) {
		// no nmi_exit if percpu first chunk is not embedded
	} else {
		nmi_exit();
	}

	/*
	 * nmi does not call nap_adjust_return because nmi should not create
	 * new work to do (must use irq_work for that).
	 */

#ifdef CONFIG_PPC64
#ifdef CONFIG_PPC_BOOK3S
	if (arch_irq_disabled_regs(regs)) {
		unsigned long rst = search_kernel_restart_table(regs->nip);
		if (rst)
			regs_set_return_ip(regs, rst);
	}
#endif

	if (nmi_disables_ftrace(regs))
		this_cpu_set_ftrace_enabled(state->ftrace_enabled);

	/* Check we didn't change the pending interrupt mask. */
	WARN_ON_ONCE((state->irq_happened | PACA_IRQ_HARD_DIS) != local_paca->irq_happened);
	regs->softe = state->softe;
	local_paca->irq_happened = state->irq_happened;
	local_paca->irq_soft_mask = state->irq_soft_mask;
#endif
}

/*
 * Don't use noinstr here like x86, but rather add NOKPROBE_SYMBOL to each
 * function definition. The reason for this is the noinstr section is placed
 * after the main text section, i.e., very far away from the interrupt entry
 * asm. That creates problems with fitting linker stubs when building large
 * kernels.
 */
#define interrupt_handler __visible noinline notrace __no_kcsan __no_sanitize_address

/**
 * DECLARE_INTERRUPT_HANDLER_RAW - Declare raw interrupt handler function
 * @func:	Function name of the entry point
 * @returns:	Returns a value back to asm caller
 */
#define DECLARE_INTERRUPT_HANDLER_RAW(func)				\
	__visible long func(struct pt_regs *regs)

/**
 * DEFINE_INTERRUPT_HANDLER_RAW - Define raw interrupt handler function
 * @func:	Function name of the entry point
 * @returns:	Returns a value back to asm caller
 *
 * @func is called from ASM entry code.
 *
 * This is a plain function which does no tracing, reconciling, etc.
 * The macro is written so it acts as function definition. Append the
 * body with a pair of curly brackets.
 *
 * raw interrupt handlers must not enable or disable interrupts, or
 * schedule, tracing and instrumentation (ftrace, lockdep, etc) would
 * not be advisable either, although may be possible in a pinch, the
 * trace will look odd at least.
 *
 * A raw handler may call one of the other interrupt handler functions
 * to be converted into that interrupt context without these restrictions.
 *
 * On PPC64, _RAW handlers may return with fast_interrupt_return.
 *
 * Specific handlers may have additional restrictions.
 */
#define DEFINE_INTERRUPT_HANDLER_RAW(func)				\
static __always_inline __no_sanitize_address __no_kcsan long		\
____##func(struct pt_regs *regs);					\
									\
interrupt_handler long func(struct pt_regs *regs)			\
{									\
	long ret;							\
									\
	__hard_RI_enable();						\
									\
	ret = ____##func (regs);					\
									\
	return ret;							\
}									\
NOKPROBE_SYMBOL(func);							\
									\
static __always_inline __no_sanitize_address __no_kcsan long		\
____##func(struct pt_regs *regs)

/**
 * DECLARE_INTERRUPT_HANDLER - Declare synchronous interrupt handler function
 * @func:	Function name of the entry point
 */
#define DECLARE_INTERRUPT_HANDLER(func)					\
	__visible void func(struct pt_regs *regs)

/**
 * DEFINE_INTERRUPT_HANDLER - Define synchronous interrupt handler function
 * @func:	Function name of the entry point
 *
 * @func is called from ASM entry code.
 *
 * The macro is written so it acts as function definition. Append the
 * body with a pair of curly brackets.
 */
#define DEFINE_INTERRUPT_HANDLER(func)					\
static __always_inline void ____##func(struct pt_regs *regs);		\
									\
interrupt_handler void func(struct pt_regs *regs)			\
{									\
	interrupt_enter_prepare(regs);					\
									\
	____##func (regs);						\
									\
	interrupt_exit_prepare(regs);					\
}									\
NOKPROBE_SYMBOL(func);							\
									\
static __always_inline void ____##func(struct pt_regs *regs)

/**
 * DECLARE_INTERRUPT_HANDLER_RET - Declare synchronous interrupt handler function
 * @func:	Function name of the entry point
 * @returns:	Returns a value back to asm caller
 */
#define DECLARE_INTERRUPT_HANDLER_RET(func)				\
	__visible long func(struct pt_regs *regs)

/**
 * DEFINE_INTERRUPT_HANDLER_RET - Define synchronous interrupt handler function
 * @func:	Function name of the entry point
 * @returns:	Returns a value back to asm caller
 *
 * @func is called from ASM entry code.
 *
 * The macro is written so it acts as function definition. Append the
 * body with a pair of curly brackets.
 */
#define DEFINE_INTERRUPT_HANDLER_RET(func)				\
static __always_inline long ____##func(struct pt_regs *regs);		\
									\
interrupt_handler long func(struct pt_regs *regs)			\
{									\
	long ret;							\
									\
	interrupt_enter_prepare(regs);					\
									\
	ret = ____##func (regs);					\
									\
	interrupt_exit_prepare(regs);					\
									\
	return ret;							\
}									\
NOKPROBE_SYMBOL(func);							\
									\
static __always_inline long ____##func(struct pt_regs *regs)

/**
 * DECLARE_INTERRUPT_HANDLER_ASYNC - Declare asynchronous interrupt handler function
 * @func:	Function name of the entry point
 */
#define DECLARE_INTERRUPT_HANDLER_ASYNC(func)				\
	__visible void func(struct pt_regs *regs)

/**
 * DEFINE_INTERRUPT_HANDLER_ASYNC - Define asynchronous interrupt handler function
 * @func:	Function name of the entry point
 *
 * @func is called from ASM entry code.
 *
 * The macro is written so it acts as function definition. Append the
 * body with a pair of curly brackets.
 */
#define DEFINE_INTERRUPT_HANDLER_ASYNC(func)				\
static __always_inline void ____##func(struct pt_regs *regs);		\
									\
interrupt_handler void func(struct pt_regs *regs)			\
{									\
	interrupt_async_enter_prepare(regs);				\
									\
	____##func (regs);						\
									\
	interrupt_async_exit_prepare(regs);				\
}									\
NOKPROBE_SYMBOL(func);							\
									\
static __always_inline void ____##func(struct pt_regs *regs)

/**
 * DECLARE_INTERRUPT_HANDLER_NMI - Declare NMI interrupt handler function
 * @func:	Function name of the entry point
 * @returns:	Returns a value back to asm caller
 */
#define DECLARE_INTERRUPT_HANDLER_NMI(func)				\
	__visible long func(struct pt_regs *regs)

/**
 * DEFINE_INTERRUPT_HANDLER_NMI - Define NMI interrupt handler function
 * @func:	Function name of the entry point
 * @returns:	Returns a value back to asm caller
 *
 * @func is called from ASM entry code.
 *
 * The macro is written so it acts as function definition. Append the
 * body with a pair of curly brackets.
 */
#define DEFINE_INTERRUPT_HANDLER_NMI(func)				\
static __always_inline __no_sanitize_address __no_kcsan long		\
____##func(struct pt_regs *regs);					\
									\
interrupt_handler long func(struct pt_regs *regs)			\
{									\
	struct interrupt_nmi_state state;				\
	long ret;							\
									\
	interrupt_nmi_enter_prepare(regs, &state);			\
									\
	ret = ____##func (regs);					\
									\
	interrupt_nmi_exit_prepare(regs, &state);			\
									\
	return ret;							\
}									\
NOKPROBE_SYMBOL(func);							\
									\
static __always_inline  __no_sanitize_address __no_kcsan long		\
____##func(struct pt_regs *regs)


/* Interrupt handlers */
/* kernel/traps.c */
DECLARE_INTERRUPT_HANDLER_NMI(system_reset_exception);
#ifdef CONFIG_PPC_BOOK3S_64
DECLARE_INTERRUPT_HANDLER_RAW(machine_check_early_boot);
DECLARE_INTERRUPT_HANDLER_ASYNC(machine_check_exception_async);
#endif
DECLARE_INTERRUPT_HANDLER_NMI(machine_check_exception);
DECLARE_INTERRUPT_HANDLER(SMIException);
DECLARE_INTERRUPT_HANDLER(handle_hmi_exception);
DECLARE_INTERRUPT_HANDLER(unknown_exception);
DECLARE_INTERRUPT_HANDLER_ASYNC(unknown_async_exception);
DECLARE_INTERRUPT_HANDLER_NMI(unknown_nmi_exception);
DECLARE_INTERRUPT_HANDLER(instruction_breakpoint_exception);
DECLARE_INTERRUPT_HANDLER(RunModeException);
DECLARE_INTERRUPT_HANDLER(single_step_exception);
DECLARE_INTERRUPT_HANDLER(program_check_exception);
DECLARE_INTERRUPT_HANDLER(emulation_assist_interrupt);
DECLARE_INTERRUPT_HANDLER(alignment_exception);
DECLARE_INTERRUPT_HANDLER(StackOverflow);
DECLARE_INTERRUPT_HANDLER(stack_overflow_exception);
DECLARE_INTERRUPT_HANDLER(kernel_fp_unavailable_exception);
DECLARE_INTERRUPT_HANDLER(altivec_unavailable_exception);
DECLARE_INTERRUPT_HANDLER(vsx_unavailable_exception);
DECLARE_INTERRUPT_HANDLER(facility_unavailable_exception);
DECLARE_INTERRUPT_HANDLER(fp_unavailable_tm);
DECLARE_INTERRUPT_HANDLER(altivec_unavailable_tm);
DECLARE_INTERRUPT_HANDLER(vsx_unavailable_tm);
DECLARE_INTERRUPT_HANDLER_NMI(performance_monitor_exception_nmi);
DECLARE_INTERRUPT_HANDLER_ASYNC(performance_monitor_exception_async);
DECLARE_INTERRUPT_HANDLER_RAW(performance_monitor_exception);
DECLARE_INTERRUPT_HANDLER(DebugException);
DECLARE_INTERRUPT_HANDLER(altivec_assist_exception);
DECLARE_INTERRUPT_HANDLER(CacheLockingException);
DECLARE_INTERRUPT_HANDLER(SPEFloatingPointException);
DECLARE_INTERRUPT_HANDLER(SPEFloatingPointRoundException);
DECLARE_INTERRUPT_HANDLER_NMI(WatchdogException);
DECLARE_INTERRUPT_HANDLER(kernel_bad_stack);

/* slb.c */
DECLARE_INTERRUPT_HANDLER_RAW(do_slb_fault);
DECLARE_INTERRUPT_HANDLER(do_bad_segment_interrupt);

/* hash_utils.c */
DECLARE_INTERRUPT_HANDLER(do_hash_fault);

/* fault.c */
DECLARE_INTERRUPT_HANDLER(do_page_fault);
DECLARE_INTERRUPT_HANDLER(do_bad_page_fault_segv);

/* process.c */
DECLARE_INTERRUPT_HANDLER(do_break);

/* time.c */
DECLARE_INTERRUPT_HANDLER_ASYNC(timer_interrupt);

/* mce.c */
DECLARE_INTERRUPT_HANDLER_NMI(machine_check_early);
DECLARE_INTERRUPT_HANDLER_NMI(hmi_exception_realmode);

DECLARE_INTERRUPT_HANDLER_ASYNC(TAUException);

/* irq.c */
DECLARE_INTERRUPT_HANDLER_ASYNC(do_IRQ);

void __noreturn unrecoverable_exception(struct pt_regs *regs);

void replay_system_reset(void);
void replay_soft_interrupts(void);

static inline void interrupt_cond_local_irq_enable(struct pt_regs *regs)
{
	if (!arch_irq_disabled_regs(regs))
		local_irq_enable();
}

long system_call_exception(struct pt_regs *regs, unsigned long r0);
notrace unsigned long syscall_exit_prepare(unsigned long r3, struct pt_regs *regs, long scv);
notrace unsigned long interrupt_exit_user_prepare(struct pt_regs *regs);
notrace unsigned long interrupt_exit_kernel_prepare(struct pt_regs *regs);
#ifdef CONFIG_PPC64
unsigned long syscall_exit_restart(unsigned long r3, struct pt_regs *regs);
unsigned long interrupt_exit_user_restart(struct pt_regs *regs);
unsigned long interrupt_exit_kernel_restart(struct pt_regs *regs);
#endif

#endif /* __ASSEMBLY__ */

#endif /* _ASM_POWERPC_INTERRUPT_H */

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Name Type Size Permission Actions
book3s Folder 0755
nohash Folder 0755
vdso Folder 0755
8xx_immap.h File 13.81 KB 0644
Kbuild File 262 B 0644
accounting.h File 908 B 0644
archrandom.h File 417 B 0644
asm-compat.h File 1.94 KB 0644
asm-const.h File 443 B 0644
asm-offsets.h File 35 B 0644
asm-prototypes.h File 2.17 KB 0644
asm.h File 154 B 0644
async_tx.h File 908 B 0644
atomic.h File 11.55 KB 0644
backlight.h File 1.02 KB 0644
barrier.h File 3.95 KB 0644
bitops.h File 9.13 KB 0644
bootx.h File 1.12 KB 0644
bpf_perf_event.h File 233 B 0644
btext.h File 1006 B 0644
bug.h File 3.23 KB 0644
cache.h File 2.9 KB 0644
cacheflush.h File 3.91 KB 0644
cell-pmu.h File 3.41 KB 0644
cell-regs.h File 9.57 KB 0644
checksum.h File 5.73 KB 0644
clocksource.h File 185 B 0644
cmpxchg.h File 16.28 KB 0644
code-patching-asm.h File 397 B 0644
compat.h File 2.5 KB 0644
context_tracking.h File 250 B 0644
copro.h File 593 B 0644
cpm.h File 25 B 0644
cpm1.h File 21.06 KB 0644
cpm2.h File 48.4 KB 0644
cpu_has_feature.h File 1.31 KB 0644
cpu_setup.h File 2.48 KB 0644
cpufeature.h File 1.04 KB 0644
cpuidle.h File 3.33 KB 0644
cputable.h File 23.17 KB 0644
cputhreads.h File 2.83 KB 0644
cputime.h File 2.22 KB 0644
crashdump-ppc64.h File 624 B 0644
current.h File 680 B 0644
dbdma.h File 3.72 KB 0644
dbell.h File 3.93 KB 0644
dcr-generic.h File 930 B 0644
dcr-mmio.h File 1 KB 0644
dcr-native.h File 3.77 KB 0644
dcr-regs.h File 5.71 KB 0644
dcr.h File 2.06 KB 0644
debug.h File 1.9 KB 0644
delay.h File 3.22 KB 0644
device.h File 1.09 KB 0644
disassemble.h File 2.14 KB 0644
dma-direct.h File 391 B 0644
dma.h File 10.38 KB 0644
drmem.h File 2.94 KB 0644
dt_cpu_ftrs.h File 756 B 0644
dtl.h File 1.06 KB 0644
edac.h File 1.08 KB 0644
eeh.h File 14.79 KB 0644
eeh_event.h File 826 B 0644
ehv_pic.h File 963 B 0644
elf.h File 6.48 KB 0644
elfnote.h File 527 B 0644
emergency-restart.h File 43 B 0644
emulated_ops.h File 2.02 KB 0644
epapr_hcalls.h File 16.43 KB 0644
exception-64e.h File 5.72 KB 0644
exception-64s.h File 4.25 KB 0644
exec.h File 246 B 0644
extable.h File 1.18 KB 0644
fadump-internal.h File 5.35 KB 0644
fadump.h File 1.38 KB 0644
feature-fixups.h File 9.7 KB 0644
firmware.h File 5.47 KB 0644
fixmap.h File 3.46 KB 0644
floppy.h File 5.01 KB 0644
fpu.h File 509 B 0644
fsl_gtm.h File 1.17 KB 0644
fsl_hcalls.h File 17.2 KB 0644
fsl_lbc.h File 10.24 KB 0644
fsl_pamu_stash.h File 411 B 0644
fsl_pm.h File 1.16 KB 0644
ftrace.h File 5.08 KB 0644
futex.h File 2.19 KB 0644
grackle.h File 331 B 0644
guest-state-buffer.h File 27.38 KB 0644
hardirq.h File 948 B 0644
head-64.h File 5.36 KB 0644
heathrow.h File 2.53 KB 0644
highmem.h File 2.03 KB 0644
hmi.h File 971 B 0644
hugetlb.h File 2.3 KB 0644
hvcall.h File 22.61 KB 0644
hvconsole.h File 800 B 0644
hvcserver.h File 1.44 KB 0644
hvsi.h File 2.83 KB 0644
hw_breakpoint.h File 3.69 KB 0644
hw_irq.h File 12.64 KB 0644
hydra.h File 2.88 KB 0644
i8259.h File 361 B 0644
ibmebus.h File 2.18 KB 0644
icswx.h File 4.97 KB 0644
idle.h File 2.37 KB 0644
imc-pmu.h File 3.91 KB 0644
immap_cpm2.h File 10.5 KB 0644
inst.h File 3.9 KB 0644
interrupt.h File 20.21 KB 0644
io-defs.h File 3.09 KB 0644
io-workarounds.h File 1.28 KB 0644
io.h File 30.97 KB 0644
io_event_irq.h File 1.71 KB 0644
iommu.h File 10.19 KB 0644
ipic.h File 3.07 KB 0644
irq.h File 1.33 KB 0644
irq_work.h File 213 B 0644
irqflags.h File 239 B 0644
isa-bridge.h File 654 B 0644
jump_label.h File 1.3 KB 0644
kasan.h File 2.27 KB 0644
kdebug.h File 291 B 0644
kdump.h File 1.37 KB 0644
kexec.h File 6 KB 0644
kexec_ranges.h File 743 B 0644
keylargo.h File 10.8 KB 0644
kfence.h File 1.16 KB 0644
kgdb.h File 2.11 KB 0644
kprobes.h File 2.64 KB 0644
kup.h File 4.21 KB 0644
kvm_asm.h File 4.89 KB 0644
kvm_book3s.h File 23.17 KB 0644
kvm_book3s_32.h File 816 B 0644
kvm_book3s_64.h File 18.78 KB 0644
kvm_book3s_asm.h File 3.56 KB 0644
kvm_book3s_uvmem.h File 2.67 KB 0644
kvm_booke.h File 2.41 KB 0644
kvm_booke_hv_asm.h File 1.91 KB 0644
kvm_fpu.h File 2.15 KB 0644
kvm_guest.h File 573 B 0644
kvm_host.h File 22.43 KB 0644
kvm_para.h File 752 B 0644
kvm_ppc.h File 37.63 KB 0644
libata-portmap.h File 249 B 0644
linkage.h File 508 B 0644
livepatch.h File 604 B 0644
local.h File 3.36 KB 0644
lppaca.h File 4.53 KB 0644
lv1call.h File 18.12 KB 0644
machdep.h File 8.74 KB 0644
macio.h File 3.93 KB 0644
mc146818rtc.h File 736 B 0644
mce.h File 6.58 KB 0644
mediabay.h File 1.34 KB 0644
mem_encrypt.h File 456 B 0644
membarrier.h File 877 B 0644
mman.h File 1.11 KB 0644
mmiowb.h File 374 B 0644
mmu.h File 10.63 KB 0644
mmu_context.h File 8.67 KB 0644
mmzone.h File 902 B 0644
module.h File 2.38 KB 0644
module.lds.h File 95 B 0644
mpc5121.h File 3.77 KB 0644
mpc52xx.h File 9.76 KB 0644
mpc52xx_psc.h File 9.89 KB 0644
mpc5xxx.h File 610 B 0644
mpc6xx.h File 143 B 0644
mpc85xx.h File 2.33 KB 0644
mpic.h File 13.98 KB 0644
mpic_msgr.h File 3.36 KB 0644
mpic_timer.h File 1.16 KB 0644
msi_bitmap.h File 867 B 0644
nmi.h File 372 B 0644
nvram.h File 2.77 KB 0644
ohare.h File 1.64 KB 0644
opal-api.h File 30.97 KB 0644
opal.h File 17.01 KB 0644
paca.h File 8.66 KB 0644
page.h File 8.64 KB 0644
page_32.h File 1.51 KB 0644
page_64.h File 2.65 KB 0644
papr-sysparm.h File 1.51 KB 0644
paravirt.h File 6.18 KB 0644
paravirt_api_clock.h File 65 B 0644
parport.h File 960 B 0644
pasemi_dma.h File 22.73 KB 0644
pci-bridge.h File 9.36 KB 0644
pci.h File 3.51 KB 0644
percpu.h File 782 B 0644
perf_event.h File 1.47 KB 0644
perf_event_fsl_emb.h File 1.22 KB 0644
perf_event_server.h File 7.01 KB 0644
pgalloc.h File 2.2 KB 0644
pgtable-be-types.h File 2.37 KB 0644
pgtable-masks.h File 1.11 KB 0644
pgtable-types.h File 2.23 KB 0644
pgtable.h File 5.99 KB 0644
pkeys.h File 4.18 KB 0644
plpar_wrappers.h File 14.62 KB 0644
plpks.h File 5.09 KB 0644
pmac_feature.h File 13.35 KB 0644
pmac_low_i2c.h File 3.03 KB 0644
pmac_pfunc.h File 8.04 KB 0644
pmc.h File 1.09 KB 0644
pmi.h File 1.15 KB 0644
pnv-ocxl.h File 3 KB 0644
pnv-pci.h File 2.4 KB 0644
powernv.h File 454 B 0644
ppc-opcode.h File 32.59 KB 0644
ppc-pci.h File 2.77 KB 0644
ppc4xx.h File 328 B 0644
ppc_asm.h File 23.13 KB 0644
probes.h File 2.46 KB 0644
processor.h File 13.06 KB 0644
prom.h File 7 KB 0644
ps3.h File 14.84 KB 0644
ps3av.h File 22.81 KB 0644
ps3gpu.h File 1.88 KB 0644
ps3stor.h File 1.38 KB 0644
pte-walk.h File 1.52 KB 0644
ptrace.h File 11.81 KB 0644
qspinlock.h File 4.76 KB 0644
qspinlock_types.h File 1.59 KB 0644
reg.h File 63.24 KB 0644
reg_8xx.h File 2.8 KB 0644
reg_booke.h File 28.05 KB 0644
reg_fsl_emb.h File 3.94 KB 0644
rheap.h File 2.52 KB 0644
rio.h File 424 B 0644
rtas-types.h File 2.84 KB 0644
rtas-work-area.h File 2.75 KB 0644
rtas.h File 23.33 KB 0644
runlatch.h File 1.15 KB 0644
seccomp.h File 1.02 KB 0644
sections.h File 2.04 KB 0644
secure_boot.h File 476 B 0644
security_features.h File 3.43 KB 0644
secvar.h File 994 B 0644
serial.h File 473 B 0644
set_memory.h File 1.41 KB 0644
setjmp.h File 400 B 0644
setup.h File 2.79 KB 0644
sfp-machine.h File 12.38 KB 0644
shmparam.h File 206 B 0644
signal.h File 506 B 0644
simple_spinlock.h File 6.1 KB 0644
simple_spinlock_types.h File 487 B 0644
smp.h File 7.01 KB 0644
smu.h File 19.33 KB 0644
sparsemem.h File 843 B 0644
spinlock.h File 474 B 0644
spinlock_types.h File 380 B 0644
spu.h File 23.41 KB 0644
spu_csa.h File 6.02 KB 0644
spu_info.h File 272 B 0644
spu_priv1.h File 5.01 KB 0644
sstep.h File 4.6 KB 0644
stackprotector.h File 604 B 0644
stacktrace.h File 297 B 0644
static_call.h File 1.04 KB 0644
string.h File 2.8 KB 0644
svm.h File 591 B 0644
swab.h File 173 B 0644
swiotlb.h File 413 B 0644
switch_to.h File 3.15 KB 0644
synch.h File 2.11 KB 0644
syscall.h File 2.95 KB 0644
syscall_wrapper.h File 1.63 KB 0644
syscalls.h File 5.05 KB 0644
syscalls_32.h File 1.58 KB 0644
systemcfg.h File 1.69 KB 0644
task_size_32.h File 544 B 0644
task_size_64.h File 2.57 KB 0644
tce.h File 892 B 0644
text-patching.h File 7.37 KB 0644
thread_info.h File 7.7 KB 0644
time.h File 2.92 KB 0644
timex.h File 463 B 0644
tlb.h File 2.3 KB 0644
tlbflush.h File 271 B 0644
tm.h File 624 B 0644
topology.h File 4.07 KB 0644
trace.h File 7.26 KB 0644
trace_clock.h File 372 B 0644
tsi108.h File 3.19 KB 0644
tsi108_irq.h File 3.82 KB 0644
tsi108_pci.h File 1.16 KB 0644
types.h File 573 B 0644
uaccess.h File 14.44 KB 0644
udbg.h File 1.7 KB 0644
uic.h File 403 B 0644
ultravisor-api.h File 941 B 0644
ultravisor.h File 2.05 KB 0644
uninorth.h File 8.21 KB 0644
unistd.h File 1.45 KB 0644
uprobes.h File 770 B 0644
user.h File 1.95 KB 0644
vas.h File 7.91 KB 0644
vdso.h File 1022 B 0644
vdso_datapage.h File 1.72 KB 0644
vermagic.h File 612 B 0644
vga.h File 1.13 KB 0644
video.h File 431 B 0644
vio.h File 4.54 KB 0644
vmalloc.h File 554 B 0644
vphn.h File 802 B 0644
word-at-a-time.h File 4.79 KB 0644
xics.h File 4.39 KB 0644
xive-regs.h File 4.96 KB 0644
xive.h File 5.07 KB 0644
xmon.h File 733 B 0644
xor.h File 1017 B 0644
xor_altivec.h File 888 B 0644
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